Abstract
We investigated the electrical and structural properties of W/Er/SiO 2 and Pt/SiO 2 gate stacks. W/Er/SiO 2 gate stacks exhibited increased capacitance after rapid thermal annealing (RTA) process while the capacitance of Pt/SiO 2 gate stacks remained unchangeable regardless of RTA process. Because of the physical plasma damage that occurred during the sputtering deposition process, Pt penetration led to a decrease in the SiO 2 film thickness of Pt/SiO 2 gate stacks. This resulted in the reduction of the equivalent oxide thickness compared to the poly-Si/SiO 2 gate stack. A relatively small flatband voltage shift of W/Er/SiO 2 gate stacks was attributed to the reduction of effective oxide charge caused by interfacial reaction between Er and SiO 2 films.
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