Epitaxial growth of InP on Si by OMVPE — defect reduction in epitaxial InP using InAsxP1−xInP superlattices

Abstract

The heteroepitaxy of InP on Si substrates was investigated using OMVPE. A new epitaxial structure with a GaAs intermediate layer, 100 nm thick, was used to alleviate the 8.4% lattice mismatch between InP and Si. Four-inch size InP single crystal with a specular surface and good thickness uniformity (Δdd=±8%) was reproducibly obtained. It was found that the GaAs intermediate layer effectively reduced the residual stress in the InP epilayer and 8.4×108 dyn/cm2 was obtained. The EPD of the as-grown epilayer, etched by HBr+H3PO4 solution, was on the order of 108 cm−2 and it decreased to (2−4)×107 cm−2 by post growth annealing in PH3+PH2 ambient. To further reduce crystalline defects, a buffer layer consisting of ten periods of InAsxP1−x(2.5 nm)InP(2.5 nm) was formed between the InP epilayers grown on both as-grown and annealed InP/GaAs/Si substrates (x=0.3). This superlattice buffer layer reduced the EPD of these epilayers to 30–50%. Using a stacked structure with superlattice buffer layer and annealed InP/GaAs/Si substrate, an InP epitaxial layer with EPD of 1×107 cm−2 was obtained.