Abstract
This article describes how current applications - communications and mobile systems - have employed FPGAs because they are more flexible than ASICs yet with higher speed and lower power consumption than CPUs. This has happened in spite of the fact that we require HDL experts to program them. New applications that can benefit from variable-grain parallelism are hot prospects to emerge as killer applications in the near future, especially as improvements in data movement are made. Enabling these new killer applications can only be accomplished by increasing designer productivity. Graphical tools that provide reusable components and means of expressing parallelism hold great promise in achieving these goals
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