Enhancement of capacitance benefit by drain offset structure in tunnel field-effect transistor circuit speed associated with tunneling probability increase

Abstract

The effect of a drain offset structure on the operation speed of a tunnel field-effect transistor (TFET) ring oscillator is investigated by technology computer-aided design (TCAD) simulation. We demonstrate that the reduction of gate–drain capacitance by the drain offset structure dramatically increases the operation speed of the ring oscillators. Interestingly, we find that this capacitance benefit to operation speed is enhanced by the increase in band-to-band tunneling probability. The “synergistic” speed enhancement by the drain offset structure and the tunneling rate increase will have promising application to the significant improvement of the operation speed of TFET circuits.