Enhancement of Board Level Reliability on Automotive DRAM Package by Optimized Thermal & Mechanical Properties

Abstract

Abstract As increased in demand for using memory devices in automotive applications, board level reliability (BLR) has been the one of the critical issue for using FBGA type packages in automotive. The required specification of BLR is listed in various standards (AEC-Q100, Q104 etc) and it is varied by automotive application customers. Most of customers are targeting grade from 1 to 3, however, requirement to memory package is grade 1 (−40°C~125°C). Currently low power (LP) memory device is widely adopted in automotive applications due to its wide bandwidth and high density capability. From package reliability point of view, it is challenge to satisfy the required BLR for target package by 1) dimension optimization, 2) selection of material, 3) mount condition, and 4) work around method. In this paper, the best combination to achieve the highest BLR life time was investigated compared with current mobile application LP4 package. Large pad size with large ball, high content of Ag in solder ball and Ni/Au pad finish were the best combination to result in the longest life time. Various density of LP4 package BLR were also estimated by mechanical simulation based from actual thermal cycling test on the highest Si volume LP4 package.