Enhancement mode p-channel SnO thin-film transistors with dual-gate structures

Abstract

The authors demonstrate the enhancement mode p-type SnO thin-film transistors (TFTs) using dual gate (DG) structures. The cross-linked polyvinyl alcohol dielectric with a polymethylmethacrylate buffer layer is formed as a top gate (TG) insulator of the DG SnO TFT. The fabricated DG SnO TFT exhibits better electrical performances than the bottom gate (BG) and TG SnO TFTs including higher field-effect mobility and smaller subthreshold slope. In fabricated DG TFTs, the threshold voltage (Vth) of the BG TFT is linearly modulated by the voltage applied to the TG electrode. The BG transfer curve exhibits a depletion mode operation when measured while TG is grounded, but operates in the enhancement mode with a negative Vth (=−0.9 V) when a positive bias of 10 V is applied to the TG electrode. The enhancement mode operation of p-type SnO TFTs can increase the output voltage swing range and decreases the off-stage leakage currents of the complementary logic circuits.