Abstract
Stochastic computing (SC) is an emerging low-cost computation paradigm for efficient approximation. It processes data in forms of probabilities and offers excellent progressive accuracy. Since SC’s accuracy heavily depends on the stochastic bitstream length, generating acceptable approximate results while minimizing the bitstream length is one of the major challenges in SC, as energy consumption tends to linearly increase with bitstream length. To address this issue, a novel energy-performance scalable approach based on quasi-stochastic number generators is proposed and validated in this work. Compared to conventional approaches, the proposed methodology utilizes a novel algorithm to estimate the computation time based on the accuracy. The proposed methodology is tested and verified on a stochastic edge detection circuit to showcase its viability. Results prove that the proposed approach offers a 12–60% reduction in execution time and a 12–78% decrease in the energy consumption relative to the conventional counterpart. This excellent scalability between energy and performance could be potentially beneficial to certain application domains such as image processing and machine learning, where power and time-efficient approximation is desired.
Highlights
With rapidly advancing technology, energy efficiency has become one of the major design challenges in digital circuits and systems
A 12–60% reduction in the operating time and a 12–78% saving in terms of the energy consumption relative to the conventional linear feedback shift register (LFSR) counterpart are observed
To address this energy-accuracy trade-off, we propose an energy-accuracy scalable efficient QSNG model (EQSNG) design that can determine the number of iterations based on the acceptable peak signal-to-noise ratio (PSNR) threshold for an image
Summary
Energy efficiency has become one of the major design challenges in digital circuits and systems. Studies demonstrate that energy efficiency can be improved by reducing both the computational time and power consumption [1] Reducing these factors affects the performance of the system. As presented in [19], increasing the length of stochastic sequences (SS) increases operating time and power consumption To address this issue, [11] introduced a quasi-stochastic bit sequence generation (QSNG) that utilizes the distributed memory elements of a field-programmable gate array (FPGA) for designing the SNGs. no comment on energy reduction has been reported in [11]. A novel energy-performance scalable methodology based on quasi-stochastic number generators is proposed and validated. A comprehensive simulation-based study is presented in this paper to demonstrate the reductions in operating time and energy consumption.
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