A Review of Deterministic Approaches to Stochastic Computing

Abstract

Stochastic computing (SC) has emerged as an alternative to conventional computing with weighted binary representation. The operations in SC can be performed through simple logic gates to significantly reduce hardware complexity. The random bitstreams generated by stochastic number generators are exploited as the computing medium in SC. However, traditional operations in SC are inaccurate because of the inherent random fluctuations in bitstreams. To resolve this issue, deterministic approaches using the relatively prime stream length, rotation, and clock division of bitstreams, have been proposed for completely accurate computing. However, these approaches require much longer bitstreams, resulting in a longer computing latency and thus a larger energy consumption. For example, the bitstream length (BSL) is approximately 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2n</sup> if two numbers with n-bit precision are multiplied using a deterministic approach. The studies aimed at lowering the latency and energy can be divided into two categories of serial and parallel designs to, respectively, reduce the BSL and parallelize bitstreams. These deterministic approaches to SC and the associated designs are reviewed in this paper with discussions of their strengths and weaknesses for possible improvements in future work.