Energy‐efficient successive‐approximation‐register based capacitive interface for pressure sensors

Abstract

A novel energy-efficient 8 bit 2.78 kS/s capacitance-to-digital converter (CDC) interface for capacitive pressure sensors is presented. A new direct-capacitance-comparison technique (DCCT) is proposed and employed together with a successive approximation register (SAR) algorithm to resolve the sensor capacitance by, directly, comparing it with an on-chip binary-weighted capacitive digital-to-analogue converter (DAC) array. An offset DAC array compensates for the sensor rest and parasitic capacitances, accordingly, the interface gives a dynamically zoomed digital-output code that corresponds only to the sensor capacitance change. The full-scale input capacitance of the CDC is easily adjustable to interface to a wide range of sensors. The proposed 8 bit SAR-based CDC is designed and simulated using 0.18 μm standard CMOS technology. The CDC exhibits a capacitance sensing range from 4 to 6 pF, provides a resolution and linearity of 7.26 and 8.2 bit, respectively. It achieves a figure-of-merit of 1.8 pJ/step at 1.4 V supply and 36 μs conversion time. Compared with the state-of-the-art implementations with similar performance.