Abstract

Thin-film transistors (TFTs) with channels made of hydrogenated amorphous silicon (a-Si:H) and polycrystalline silicon (poly-Si) are used extensively in the display industry. Amorphous silicon continues to dominate large-format display technology, but a-Si:H has a low electron mobility, μ ∼ 1 cm2/V s. Transparent, conducting metal-oxide materials such as Indium-Gallium-Zinc Oxide (IGZO) have demonstrated electron mobilities of 10–50 cm2/V s and are candidates to replace a-Si:H for TFT backplane technologies. The device performance depends strongly on the type of band alignment of the gate dielectric with the semiconductor channel material and on the band offsets. The factors that determine the conduction and valence band offsets for a given material system are not well understood. Predictions based on various models have historically been unreliable and band offset values must be determined experimentally. This paper provides experimental band offset values for a number of gate dielectrics on IGZO for next generation TFTs. The relationship between band offset and interface quality, as demonstrated experimentally and by previously reported results, is also explained. The literature shows significant variations in reported band offsets and the reasons for these differences are evaluated. The biggest contributor to conduction band offsets is the variation in the bandgap of the dielectrics due to differences in measurement protocols and stoichiometry resulting from different deposition methods, chemistry, and contamination. We have investigated the influence of valence band offset values of strain, defects/vacancies, stoichiometry, chemical bonding, and contamination on IGZO/dielectric heterojunctions. These measurements provide data needed to further develop a predictive theory of band offsets.

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