Encoding Technique for Reducing Power Dissipation in Network on Chip Serial Links

Abstract

The interconnects have become main element in dynamic power dissipation in a Network on Chip (NoC) design. Though there have been much work on reduction of switching activity in a link, few techniques have been discussed in serial coding. In SILENT coding, the effectiveness of data dependent technique is studied. In this paper, a data independent technique is proposed in which number of switching transitions in a data word is brought down to a threshold level by rearranging data bits. To verify the efficacy of the proposed technique, encoder and decoder structures are designed using the proposed technique and described in RTL level in Verilog HDL, synthesized and mapped into UMC180 nm technology library. Proposed technique offers a maximum reduction in dynamic power consumption of 45.92%. In cases where the correlation between successive data bits is low, SILENT coding introduces an overhead in peak power consumption. It is proved that application of proposed technique with SILENT coding eliminates this overhead. The static power dissipation in proposed structure is negligible and can be easily compensated by reduction in power consumption in NOC links. In comparison with simple structure of SILENT encoder there is an overhead area of about 41.2% in structure of encoder. Proposed encoder was analyzed with various types of data streams and results confirm that unlike SILENT coding, significant power reduction is guaranteed in all the cases.