Abstract
As the advancement of transistor nodes faces unprecedented challenges and work continues to extend Moore's law at the back end of the line (BEOL), packaging has become one of the fastest growing segments in the semiconductor industry. Lead-free soldering is one of the most critical steps in interconnection at the packaging level. The evolution of packaging requirements for various devices is driving changes in lead-free solder material selection, with lower melting point being an emerging criterion. Indium, because of its unique properties such as high thermal and electrical conductivity, excellent ductility, and particularly the low melting point of 157 °C along with the capability of alloying with other metals (e.g. tin) to bring the melting point further down, is drawing increasing attention to its application in packaging, as a candidate for low temperature solders. In the current study, indium capping on standard and micro copper pillars was demonstrated. It was also shown that stacking indium and tin layers could form (near) eutectic indium-tin alloys after reflow with a melting point as low as 119 °C. The experimental next-generation indium electroplating chemistry demonstrated a strong potential to further improve the performance, such as a smoother surface morphology compared to the current generation chemistry, towards demanding requirements for future packaging applications.
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