Enabling Fine-Grained Dynamic Voltage and Frequency Scaling in SDSoC

Abstract

Dynamic Voltage and Frequency Scaling (DVFS) has been extensively applied as a system-level methodology for energy optimization or temperature control. But current DVFS systems are mostly implemented on CPUs, DVFS working on FPGAs is limited. Moreover, all current DVFS systems available for FPGAs have either low scaling resolution or long reconfiguration time, and none of them is easy to reuse. In this paper, we develop a fast and efficient ZYNQ-based DVFS platform with high resolution and short reconfiguration time. In addition, we add the DVFS support to SDSoC and make it easier and quicker to build an ZYNQ system with DVFS features. We also apply our DVFS platform to a real-time semi-global matching (SGM) accelerator as a case study, and develop a DVFS policy to optimize its power consumption. Compared to the state-of-the-art, our DVFS platform saves 45% FFs and almost all LUTs, the voltage scaling time is 7ms and the frequency scaling time is 3$\mu s$, and time for one design iteration to add DVFS support is reduced from several hours to a few minutes. Compared to its unoptimized version, the SGM accelerator with our DVFS platform saves up to 46% energy.