Abstract
The state restoration ratio (SRR) has been a de facto standard for evaluating the quality of signals selected for post-silicon tracing and debug. In this paper, we establish that SRR is intrinsically unsuitable as a metric for evaluating trace signal quality, as it captures neither the higher-level functionality of the design nor the constraints and requirements on trace signals. We present an algorithm, based on PageRank [PageRank on Netlist (PRoN)], for post-silicon trace signal selection. PageRank is not designed to maximize SRR and is applied to the circuit netlist. We demonstrate that optimizing for SRR typically generates signals that are functionally irrelevant to the design and unusable for debug, for a comprehensive set of SRR-based techniques. We assess the scalability of different signal selection algorithms by applying them to an industrial scale OpenSPARC T2 design. Our results show that our PRoN algorithm consistently outperformed other techniques with respect to scalability and functional relevance of signals selected. It also has higher restorability than the other algorithms, despite not being optimized for that metric.
Highlights
P OST-SILICON validation is a critically important [30] and expensive activity, accounting for the majority of the validation expense in modern system-on-chip (SoC) designs [37].A fundamental problem of post-silicon validation is limited observability and control
Our results showed that PageRank on Netlist (PRoN) has much better scalability than other state-of-the-art signal selection algorithms for industrial scale designs
We provide a more comprehensive experimental study to compare the quality of the selected trace signals in terms of behavioral coverage by using total restorability-based [10], [26], hybrid-analysis-based [22], ILPbased [31], [33], and simulation-based [16] signal selection algorithms
Summary
P OST-SILICON validation is a critically important [30] and expensive activity, accounting for the majority of the validation expense in modern system-on-chip (SoC) designs [37]. The scale and complexity of these design modules are several orders of magnitude greater than those of the traditional ISCAS89 benchmarks used in signal selection literature This added complexity helps to illustrate the divergence between gate-level state restorability and functional behavior. PRoN achieves higher path coverage for the signals than selected by the SRR-optimizing methods due to enhanced PageRank metric as it prefers flip-flops that are highly connected and part of many design paths. We demonstrate the scalability and viability of our PRoN signal selection algorithm on the OpenSPARC T2 SoC design modules containing up to 14,000 flip-flops and up to 74,000 logic elements. We provide a comprehensive comparison of our PRoN technique with all the signal selection-based techniques (and tools) available in the public domain This provides conclusive empirical evidence for the typical functional irrelevance of signals selected by state-of-the-art SRR-based methods
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