Abstract

Driven by the demands of the intelligent industry, integrated circuit chip has witnessed development in the direction of use of increased number of transistors and larger area. Consequently, power dissipation is increasingly limiting chip performance. In this study, an embedded microfluidic cooling solution for a 20 mm×20 mm high-power chip was realized. The microchannels and the double H type manifold channels were etched on two silicon wafers, and thereafter assembled employing the silicon-silicon direct bonding process. The depth of all the channels was 250 μm, and the width of the microchannels and manifold channels were approximately 210 μm and 2 mm after careful numerical optimization, respectively. In addition, a compact channel layout was used to enable cooling of the entire area. Platinum serpentine resistors were prepared for heating and temperature sensing, respectively. The global temperature was measured under a heat dissipation power of 417 W, the average temperature rise was 22.2 K, and the coefficient of performance was 3200 when using deionized water as the working fluid at the volume flow rate and pump pressure of 612 ml/min and 35.0 kPa, respectively. The average temperature rise agreed with the simulation results within 1.6 K. Moreover, this study proposed a simplified thermal resistance network model to examine the fin effects of the silicon substrate in the microchannels. The relationships between the Nusselt number and the Reynolds number were calculated for further optimization of channels. The proposed compact double H type manifold microchannels was concluded to be a promising embedded microfluidic cooling approach for large area high power chips.

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