Electrostatic pulse breakdown in nmos devices

Abstract

AbstractThe electrostatic discharge (ESD) sensitivity of small dimension n‐channel metal oxide semiconductor (NMOS) field effect transistors (FETs) has been investigated. NMOS FETs of varying dimensions and a constant gate oxide thickness of 400® were each subjected to a single ESD voltage pulse of between 50 and 250V at temperatures between 25 and 200°C. Over 4000 devices were used, all resident on a single 3 inch silicon wafer. The object of the experiment was to determine the dependence of device ESD sensitivity on temperature, voltage and device dimensions as well as to investigate the mechanisms that cause oxide breakdown as a result of ESD damage.No temperature dependence of device ESD sensitivity was observed within the range of the experiment. A significant voltage dependence was observed, with degradation accounting for over 80 per cent of devices at 250V. A cumulative ESD effect was observed, whereby the degradation of device performance was found to increase with the number of applied pulses. Analysis of the breakdown characteristics revealed that the cause of damage was oxide breakdown. Application of the ESD pulse appears to lead to oxide breakdown through impact ionization within the oxide, the very short duration of the pulse not being favourable to processes involving electron trapping unless these traps are already present in the oxide.