Abstract

A direct electron-beam lithography is applied to the fabrication of a submicrometer gate for an enhancement-mode GaAs MESFET logic. Exposure doses to produce submicrometer stripes in the positive PMMA resist on a GaAs wafer are investigated for different beam scans of a 0.1-µm-diameter spot. The resist adhesion against a GaAs etchant under the gate recessing is tested to make a fine control of an epitaxial layer thickness with good results. A propagation delay of 64 ps with an associated power consumption of 0.4 mW is obtained with a 0.5 × 20-µm-gate GaAs MESFET, which demonstrates the fastest speed among the enhancement-mode logics.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.