Electron Trapping in 4H-SiC MOS Capacitors Fabricated by Sodium-Enhanced Oxidation

Abstract

The electrical properties of the SiO2/SiC interface fabricated by sodium-enhanced oxidation (SEO) of n-type 4H-SiC were studied by temperature-dependent C-V and constant-capacitance deep level transient spectroscopy (CCDLTS). With the exception of near-interface traps in the SiC epi-layer, which are not present in the SEO samples, the trap species observed in SEO capacitors are the same as those observed in both standard-oxidized and NO-annealed MOS capacitors. Total electron trapping in accumulation is comparable in SEO and NO-annealed capacitors; however, the traps in SEO capacitors are located at the interface whereas tunneling into oxide traps is observed in NO-annealed samples. A series of bias-temperature stress tests show that electron trapping is essentially unchanged when mobile sodium ions are moved toward the interface. The improved mobility attained by this process compared to NO annealing may be due to the absence of near-interface SiC traps in SEO samples.