Abstract

In order to improve the interconnect performance, copper has been used as the interconnect material instead of aluminum. One of the advantages of using copper interconnects instead of aluminum is better electromigration (EM) performance and lower resistance for ultralarge-scale integrated (ULSI) circuits. Dual-damascene processes use different approaches at the via bottom for lowering the via resistance. In this study, the effect of a Ta/TaN diffusion barrier on the reliability and on the electrical performance of copper dual-damascene interconnects was investigated. A higher EM performance in copper dual-damascene structures was obtained in barrier contact via (BCV) interconnect structures with a Ta/TaN barrier layer, while a lower EM performance was observed in direct contact via (DCV) interconnect structures with a bottomless process, although DCV structures had lower via resistance compared to BCV structures. The EM failures in BCV interconnect structures were formed at the via, while those in DCV interconnect structures were formed in the copper line. The existence of a barrier layer at the via bottom was related to the difference of EM failure modes. It was confirmed that the difference in EM characteristics was explained to be due to the fact that the barrier layer at the via bottom enhanced the back stress in the copper line.

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