Abstract
In this work, we present electromagnetic optimization of a wafer-level package (WLP) intended for RF-MEMS applications. The packaging solution presented is based on a high-resistivity silicon capping substrate containing recesses and copper-filled thru-hole vias. This pre-fabricated capping substrate is first wafer-level bonded to the RF-MEMS device wafer, then populated by solder spheres and finally singulated into individual packages. For the package electrical optimization, Ansoft HFSS™ electromagnetic simulator has been used in order to assess the RF-behaviour of packaged MEMS devices, including losses and mismatch due to inductive and capacitive couplings introduced by the cap. A fully parameterized model of a 50 Ω coplanar waveguide (CPW) including all the degrees of freedom (DoFs) made available by the technological process is presented and extensively exploited for the electromagnetic optimization of the capping structure. Moreover, the measurement data obtained from the fabricated capped and uncapped test structures (50 Q CPWs and shorts) and their comparison with simulations are presented.
Published Version
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