Electrical-stress simulation of plasma-damage to submicron metal–oxide–silicon field-effect transistors: Comparison between direct current and alternating current stresses

Abstract

The study reported herein is aimed at establishing signatures of metal–oxide–silicon field-effect transistors (MOSFETs) damage induced by alternating current (ac) stressing applied at conditions that simulate plasma processing environment and the comparison of the ac stress induced damage to damage from an equivalent direct current (dc) stress. We also examine the response of stress induced damage to annealing that emulates postmetallization annealing in complementary metal–oxide–silicon processing. We apply sinusoidal and dc voltage stress signals to 0.5 μm n- or p-MOSFETs with 90-Å-thick gate oxides and anneal the stressed transistors in forming gas ambient (6% H2 and 94% N2) at 400 °C for 30 min. We assess damage on MOSFETs by measuring transconductance, threshold voltage, and subthreshold swing. We find out that the onset of damage to devices subjected to ac stressing occurs at voltage amplitudes as low as 6 V, whereas in dc stressing damage becomes significant only at voltages larger than 10 V. We also show that the forming gas annealing is able to eliminate both types of damage and recover transistor characteristics. It is proposed that carrier hopping is primarily responsible for oxide current and, hence, device damage observed following the ac stress in contrast to Fowler–Nordheim tunneling current which causes the damage produced by our dc stress.