Electrical Properties of 3C-SiC Devices on Si under Mechanical Stress

Abstract

Semiconductor devices can experience various kinds of stresses which can be induced during device fabrication, packaging and during application in thermo-mechanical or harsh environment. While the stress induced effects in semiconductors can be useful for developing mechanical sensors but these effects can also cause long term instability and unwanted errors in the device performance. These stresses in worst case can result in permanent damage of the device. Therefore, it is very important to investigate the effect of various stresses induced to the semiconductor devices for analyzing the stress sensing capability of the device as well as from the device performance point of view. Although stress induced electrical changes in silicon (Si) based devices have been studied for years and are well understood but a complete understanding of the stress induced changes in silicon carbide (SiC) based devices is still missing. SiC is a promising material for stress sensing applications in harsh environment. It is the purpose of this study to investigate the effects of stress on SiC based devices. The main focus of the study is 3C-SiC/Si based heterojunction devices and 3C-SiC Hall devices. The stress induced piezojunction effects in SiC/Si heterojunctions investigated in this study indicate that the stress can signicantly alter the heterojunction characteristics. Additionally, the pseudo-Hall effect in p-type and n-type 3C-SiC Hall devices observed in this study shows that the 3C-SiC Hall devices are promising candidates for stress sensing applications. The piezo-Hall effect has also been analyzed in both p-type and n-type 3C-SiC Hall devices and it has been observed that the piezo-Hall effect can signicantly change the magnetic eld sensitivity of the 3C-SiC Hall devices. The fundamental piezo-Hall coefficients for both n-type and p-type 3C-SiC are calculated in this study which are the basic design parameters to compensate the stress dependent offset voltage drifts in Hall devices.