Abstract
Four-inch wafer lots have been processed in a conventional CMOS polysilicon gate process. The electrical parameters are used to study the influence of the problems related to the lamp zone-melting-recrystallization (ZMR) technique. Statistical results are available. The n-channel enhancement mode transistors of a 1.7-μm effective channel length exhibit a sharp threshold voltage distribution around 0.9 V with a standard deviation of 61 mV. The leakage current remains below a 0.1-pA/μm channel width for both p- and n-channel transistors. Two hundred forty-nine stage ring oscillators have been fabricated. They have a 0.5-ns propagation delay time for an effective channel length of 1.7 μm.
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