Electrical performances degradations and physics based mechanisms under negative bias temperature instability stress for p-GaN gate high electron mobility transistors

Abstract

In this paper, an in-depth evaluation of the negative bias temperature instability (NBTI) in p-GaN gate high electron mobility transistors with Schottky-type gate contact has been reported in detail. The measured results reveal that the threshold voltage (V th) positively shifts by 0.35 V and the on-state drain-source resistance (R dson) increases by 24.2 mΩ within 1 h at room temperature, even under the minimum allowed operating gate-voltage condition (V gs = −10 V) in the datasheet of the commercial device. With the help of energy band theory and experimental analyses, donor-type traps are demonstrated to dominate the degradation by reducing the positive charges in the p-GaN cap. Moreover, further quantitative analysis has been performed by the conductance–frequency measurements method. Considering the risk of degradation induced by NBTI, it turns necessary for the system designers to choose a more suitable negative bias operating condition so as to extend the robustness of the entire power system.