Abstract
In this paper, an electrical test method and a power supply circuit are proposed for open defects at interconnects between dies in a 3D IC. The test method is based on volume of charge injected from the power supply circuit. Feasibility of the electrical tests is examined by Spice simulation. The simulation results show that a hard open defect, capacitive ones and resistive ones whose resistance is greater than or equal to 100Ω may be detected at a test speed of 0.9MHz.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
