Abstract
This work investigates Silicon-on-Insulator (SOI) pMOS leakage current. Temperature measurements indicates the superposition of two leakage mechanisms: band-to-band tunneling (BTBT) and Shockley-Read-Hall Field-Enhanced (SRHFE) generation recombination. Thanks to a dedicated low current measurement setup, the impact of device width (W), thickness (tsi) and polarization (back bias, drain and source) on leakage level is evaluated for both mechanisms.
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