Electrical characterization of polycrystalline silicon films on Si substrates processed by rapid thermal annealing

Abstract

The electrical properties of 200 nm thick As-doped polysilicon films epitaxially realigned by rapid thermal annealing in the 975-1150 degrees C temperature range have been monitored by incremental sheet resistance and Hall effect measurements. It is seen that, for As concentrations exceeding the solid solubility limit, the carrier density is constant and uniform through the whole thickness of the realigned films regardless of the non-uniformities of the dopant profile. The corresponding carrier densities are found to be equilibrium concentrations, showing that equilibrium conditions are reached during the rapid thermal annealing process and the simultaneous realignment transformation. Rutherford backscattering, channelling analysis and transmission electron microscopy show that part of the excess dopant forms nanometre-scale precipitates. In the case of non-realigned layers, dopant segregation at grain boundaries reduces the electrical activation. If the polysilicon films undergo a high-temperature heat treatment before the As implant, the thermal budget (i.e. the amount of thermal energy) needed to induce the epitaxial realignment is reduced. It is thus possible to form shallow junctions and at the same time to realign the poly-Si layer.