Electrical characteristics of nMOSFETs fabricated on hybrid orientation substrate with amorphization/templated recrystallization method

Abstract

The use of hybrid orientation technology (HOT) with direct silicon bond (DSB) wafers consisting of a (1 1 0) crystal orientation layer bonded to a bulk (1 0 0) handle wafer provides promising opportunities for easier migration of bulk CMOS designs to higher performance materials. However, the material quality of nMOSFETs regions, which has been undergone amorphization/templated recrystallization (ATR) process for transforming the Si surface into (1 0 0) orientation, is still a concern because the ATR-induced defects (i.e., dislocation loops or threads) at the recrystallization layer, could degrade gate oxide integrity. In this paper, we report an investigation of charge pumping and low-frequency (1/ f) noise in HOT nMOSFETs. Devices with the increased anneal time brought out a significant reduction in the charge pumping current and 1/ f noise, which indicates ATR-induced defects were suppressed and consequently the “low-trap-density” of the Si/SiO 2 interface. Finally, for the first time, the behavior of 1/ f noise for HOT nMOSFETs was investigated, and could be described by a unified model, i.e. a combination of carrier-number fluctuations and mobility fluctuations.