Abstract
AbstractIn the pocket doped window-based silicon-on-insulator junctionless transistor (PD-SOIJLT), a dual metal gate (DMG) design is proposed. Using the SILVACO ATLAS-2D device simulator, its electrical and RF performances are analyzed and evaluated against those of single metal gate (SMG) PD-SOIJLT. The simulation outcomes confirm the improvements in the distributions of electric field, electron velocity, and potential, along the channel of the DMG-based structure. For DMG PD-SOIJLT over SMG PD-SOIJLT, drain induced barrier lowering (DIBL) and ON-state current are enhanced by 7.67% and 55.16%, respectively. Moreover, transconductance and cutoff frequency have also improved by 12.39% and 13.72%, respectively in DMG-based structure over SMG-based structure.KeywordsPocket doped windowDual metal gate (DMG)Single metal gate (SMG)Junctionless transistorSilicon-on-insulator (SOI)Electrical performance and radio-frequency (RF) performance
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