Efficient technique for generating minimum test sets for general tree logic circuits

Abstract

This paper constructs, in a simple manner, a minimum test set for general tree logic circuits from the test sets of its nodes. A general combinational circuit can in most cases be decomposed to modules such that these modules constitute the basic logic elements of a tree circuit. Basically, our technique relies on the characteristics of tree circuits in which no backtracking is necessary after assigning one or zero to any signal line in them. The number of tests in the generated test set has an upper bound of 2m, with n being the number of the primary inputs of the given circuit.