Efficient signal processing on a VLSI array

Abstract

The authors derive efficient parallel algorithms on a VLSI array for several signal and image processing tasks. The parallel architecture has n/sup 2/ memory modules storing the input data which is accessed by n PEs. They consider several signal processing tasks such as k selection, median filtering, labeling 0/1 image, etc. For these problems, linear speedup is obtained, compared to a single-processor system. For the k selection problem they also provide an efficient parallel solution using log transformation on the data. The expected time of this method is O(n) with a small constant factor. The proposed array is suitable for general-purpose signal processing and can be implemented in VLSI using a limited chip set.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>