Abstract

In order to verify the system performance of mixed-signal systems on chip (SoCs), computer-aided design (CAD) tools are required to generate 1/f/sup /spl alpha// noise that degrades the performance of most analog circuits. Current techniques for generating discrete sequences of 1/f/sup /spl alpha// noise require a large amount of computations that place an excessive burden on the computation engine and random number generators. In this paper, the authors propose a low-complexity 1/f/sup /spl alpha// noise generation scheme, which is based on a multirate filter bank. In this scheme, each branch in the filter bank processes signals in a different frequency band while allowing for arbitrary selection of /spl alpha/ in each bank. The proposed approach greatly reduces computations when compared to traditional noise generation processes of using a single noise-shaping filter. Furthermore, it allows selecting different combinations of noise frequency response in different frequency bands, thus allowing calibration of noise generated in simulation to the one measured in the laboratory from test chips. A comparison of various noise generation schemes is also presented.

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