Efficient memory management for FFT processors

Abstract

This paper presents an efficient memory management scheme for memory-based architecture of Fast Fourier Transform (FFT). A new data relocating scheme is proposed to merge multiple banks for alleviating the area requirement as well as the power dissipation of memory-based FFT. The proposed memory addressing method can effectively deal with merged-banked single-ported memory with high-radix processing elements. Compared to conventional memory-based FFT designs using two-ported memories, the derived architecture reveals better performance in area requirement and power consumption.