Abstract

NAND flash memories, due to their several advantageous characteristics, have recently dominated the data storage industry and its global market. Currently, multi-level cell memories, in which each cell can store more than one bit of data resulting in higher data storage capacities, have gained a considerable amount of research interest. However, this comes at the cost of several limitations and increased performance degradation. Various studies have shown that among several error sources in multi-level cell memories, inter-cell interference is the most significant one. Therefore, to mitigate the devastating effect of the interference, simple, feasible, and yet efficient equalisation techniques become essential for achieving desired data reliability. In this study, first, a thorough analysis on deriving the distribution of the interference-free and interference-affected data is carried out. Then, novel low-complexity equalisation methods are proposed, and their beneficial complexity-performance trade-offs compared with the existing techniques are illustrated. Finally, simulation results are presented to show that the proposed algorithms considerably improve the error performance, while maintaining the low-complexity constraints.

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