Abstract
To reduce the noise created by a power delivery network, the number, the value of decoupling capacitors and their arrangement on the board are critical to reaching this goal. This work deals with specific improvements, implemented on a genetic algorithm, which used for the optimization of the decoupling capacitors in order to obtain the frequency spectrum of the input impedance in different positions on the network, below previously defined values. Measurements are performed on a specifically manufactured board in order to validate the effectiveness of the proposed algorithm and the optimization results obtained for a specific example board.
Highlights
The miniaturization of the devices is nowadays a consolidated trend in the industry development of the electronic products that are boosted by the spread of the Internet of Thing (IoT) paradigm [1], as well as by other new technologies, such as 5G [2] and high-speed digital transmission [3].This reduction of the overall geometrical dimensions is greatly implemented at the printed circuit board (PCB) level and, with the proper scaling factor, at package and chip level respectively
An efficient procedure is developed for the optimum placement of decoupling capacitors for the power delivery network (PDN) design at PCB level
The procedure is based on an improved genetic algorithm (GA) modified with respect to the previously developed version
Summary
The miniaturization of the devices is nowadays a consolidated trend in the industry development of the electronic products that are boosted by the spread of the Internet of Thing (IoT) paradigm [1], as well as by other new technologies, such as 5G [2] and high-speed digital transmission [3]. At each new iteration a new decap is added whose value and location comes from the GA-based optimization This allows an efficient decap placement by gradually improving the input impedance until the stopping criteria are met; the actual decap configuration is the one that fulfill the requirement with a minimum number of components. Together to this change in the optimization architecture, the GA developed in Reference [14] has been improved for a more effective and reliable process by adding the twin removal [32,33], and the binary coding of all inputs to increase the randomness of the configuration selection.
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