Efficient FPGA Implementation of Modular Arithmetic for Elliptic Curve Cryptography

Abstract

High throughput and low resource are the crucial design parameters of elliptic curve cryptographic (ECC) processor in many applications. The efficiency of ECC processor mainly depends on modular arithmetic operations such as modular addition, subtraction and multiplication. In this brief, hardware architectures of modular arithmetic over the prime field are presented. The novelty of this work is to execute modular addition and modular subtraction in a combined architecture. In addition, multiplication and modular operations are executed in a separate module instead of doing modular multiplication in a single operation which has significantly improved circuit latency and area optimization. The proposed architectures have been synthesized on Virtex-5 field-programmable gate array (FPGA) technology and achieved 0.575μs and 2.04μs computational time, as well as 4% and 17% of available slice-LUTs for 256-bit, combined modular addition and subtraction and modular multiplication respectively. The design offers almost 50-80% area minimization and reduces nearly 10-90% of the required time in comparison with the related designs. To our best knowledge, our architectures provide a better throughput/area performance on FPGA than the recent related work which is very impressive for the design of Ecc processor.