Efficient fault-tolerant implementation of imprecision tolerant applications in nano scale error-prone VLSI technologies: A case study on fuzzy hardware

Abstract

Emerging nano-level technologies provide very high device densities that facilitate high performance implementation of more complex applications. However, they also introduce new challenging reliability issues such as appearance of transient faults and concurrent occurrence of multiple faults in the circuits. Due to their nondeterministic nature, absolute detection and correction of all multiple concurrent transient faults in a circuit is a challenging task which becomes infeasible due to its very high space, time, or data redundancies as the number of concurrent faults increases. Fortunately, based to the emerging imprecise computing paradigm, it is not mandatory to detect and correct all the faults in a circuit when implementing an “Imprecision Tolerant” application, due to its inherent tolerance against imprecision. Thanks to this useful relaxation, this paper exploits the Relaxed Triple-Modular-Redundancy (RTMR) to trade the inherent robustness of the fuzzy applications against imprecision, to efficiently realize the defuzzification block as the most computation-intensive part of a Mamdani fuzzy processor in an unreliable technology. The traditional TMR is essentially developed to only cope with single permanent faults and the number of redundant components should be increased to N in an NMR system in order to handle (N-1)/2 concurrent faults. However, the experimental results show that RTMR can mitigate more numbers of concurrent transient faults with less overhead with respect to NMR. The synthesis results show that exploiting TMR causes higher area, delay, and power consumption overheads of up to 71%, 25%, and 63% respectively with respect to RTMR.