Abstract
Quantum-dot Cellular Automata (QCA) as a nanoscale transistor-less device technology offers distinguishing advantages over the limitations of CMOS circuits. In this paper, we propose an innovative and efficient implementation for QCA SRAM cell. This design incorporates one three-input and one five-input majority gate in addition to a 2:1 multiplexer block realizing a highly optimized layout design for a cost-effective SRAM cell. The structural robustness and energy efficiency of the proposed design are precisely evaluated using QCADesigner and QCAPro tools. Results indicate that the proposed QCA SRAM cell performs favorably compared to the previous designs with respect to circuit complexity and energy requirements.
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