Effects of Substrate Bias on Low-Frequency Noise in Lateral Bipolar Transistors Fabricated on Silicon-on-Insulator Substrate

Abstract

This letter presents a systematic study of how the substrate bias ( ${V}_{\text {sub}}$ ) modulation affects the current-voltage ( ${I}$ - ${V}$ ) characteristics and low-frequency noise (LFN) of lateral bipolar junction transistors (LBJTs) fabricated on a silicon-on-insulator (SOI) substrate. The current gain ( $\beta$ ) of npn LBJTs at low base voltage can be greatly improved by a positive ${V}_{\text {sub}}$ as a result of enhanced electron injection into the base near the buried oxide (BOX)/silicon interface. However, an excessive positive ${V}_{\text {sub}}$ may also adversely affect the LFN performance by amplifying the noise generated as a result of carrier trapping and detrapping at that interface. Our results provide a practical guideline for improving both $\beta $ and the overall noise performance when using our LBJT as a local signal amplifier.