Effects of self-aligned electroplating Cu pillar/Sn-xAg bump on dense Al lines for chip-to-package connection

Abstract

Self-aligned electroplating is applied to form the Cu pillar/Sn-Ag bump for semiconductor device packaging, while passivation SiN cracks are usually observed at the bump edge on the bump of the array (BOA). In this paper, the simulation method was used to investigate the mechanism of SiN cracks and then, the bump process was optimized to improve the mechanical properties of the Cu pillar/Sn-Ag bump. It was found that higher reflow rounds could improve the shear strength due to the large degree of contact between the rugged scallop-like shape of the Cu6Sn5 and the Sn-Ag solder. The fracture plane cleaved between the Sn-Ag and Cu6Sn5 interface is consistent with the simulation results. The hardness of the Sn‒Ag solder is proportional to the reflow rounds, and the amount of Ag3Sn phase precipitation within the Sn-Ag solder contributes to the hardness value. In contrast, the disadvantage is that thermal residual stress could deteriorate the SiN crack, especially for a BOA structure The study concludes that an optimal bump process, including Sn-2%Ag solders at 260°C for 30s, could obtain a high shear strength and appropriate solder hardness without passivated SiN cracking.