Abstract
The authors report the use of postdeposition annealing (PDA) to improve the performance of a high-k (HK)-last/gate-last integration scheme involving the use of a chemical oxide interfacial layer (IL). They find that the chemical oxide IL can form Hf-silicate at the HK/IL interface to provide a larger effective k value and a smaller equivalent oxide thickness. They also find that they can achieve a small gate leakage current density (Jg) and minimal flat-band voltage (Vfb) degradation by PDA in O2 atmosphere. Furthermore, they find that Jg and Vfb can be further improved by optimizing the metal gate stack.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have