Abstract
This study investigated the effect of plasma pretreatment on the process of a self-forming Cu–Mn alloy barrier on porous low-k dielectrics. To study the effects of plasma on the performance of a self-formed Mn-based barrier, low-k dielectrics were pretreated with H2 plasma or NH3 plasma. Cu–Mn alloy materials on low-k substrates that were subject to pretreatment with H2 plasma exhibited lower electrical resistivity values and the formation of thicker Mn-based interlayers than those on low-k substrates that were subject to pretreatment with NH3 plasma. Transmission electron microscopy (TEM), X-ray photoemission spectroscopy (XPS), and thermal stability analyses demonstrated the exceptional performance of the Mn-based interlayer on plasma-pretreated low-k substrates with regard to thickness, chemical composition, and reliability. Plasma treating with H2 gas formed hydrophilic Si–OH bonds on the surface of the low-k layer, resulting in Mn-based interlayers with greater thickness after annealing. However, additional moisture uptake was induced on the surface of the low-k dielectric, degrading electrical reliability. By contrast, plasma treating with NH3 gas was less effective with regard to forming a Mn-based interlayer, but produced a Si–N/C–N layer on the low-k surface, yielding improved barrier characteristics.
Highlights
With the continued miniaturization of microelectronic integrated circuits (ICs), interconnect resistivity has come to affect device performance
The low-k dielectrics were treated with two different types of plasma for various periods of time
The effects of plasma treatment on the low-k dielectric materials were investigated via FTIR and contact angle measurements
Summary
With the continued miniaturization of microelectronic integrated circuits (ICs), interconnect resistivity has come to affect device performance. Various low-k materials have emerged as silicon dioxide replacement materials to decrease the capacitance between metal lines.[1,2,3,4] The diffusion of Cu into the low-k dielectric must be prevented; a double layer of Ta/TaN was introduced into the damascene process as a physical barrier layer.[5] with a reduction in the size of transistor features, the thickness of the diffusion barrier has been estimated to be approximately one nanometer At this size regime, conventional Ta and TaN are not reliable in terms of forming an ultra-thin uniform barrier layer; the reliability of the interconnect suffers. This process involves the direct deposition of Cu alloy thin films onto a Sibased dielectric, followed by annealing to transport the alloying element to the interface between the Cu alloy and the dielectric, forming a thin oxide or silicate layer due to the reaction with the Si-based dielectric.[6,7,8,9,10,11] Among the investigated alloy elements, Mn has shown promise due to its high diffusivity and large coefficient of activity in Cu.[8]
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