Effects of metal work function and gate-oxide dielectric on super high frequency performance of a non-align junction DG-MOSFET based inverter in the sub-100 nm regime: a TCAD simulation analysis

Abstract

ABSTRACT This paper presents simulation analysis of an inverter made from non-aligned double gate field effect transistors (NADGFETs) in Sub-100 nm regime. The inverter consists of n-channel NADGFET and p-channel NADGFET device with a channel length of 40 nm and 50% non-alignment between gate and source/drain. The response of the inverter was tested by a combination of gate dielectric constant (k) and metal work function (ϕ). Three gate dielectrics namely, SiO2 (k = 3.9), Si3N4 (k = 7.2), HfO2 (k = 24), and three metal work function namely tungsten (ϕ = 4.5 eV), molybdenum (ϕ = 4.75 eV), gold (ϕ = 5 eV), were considered in the NADGFET inverter. This paper defines a kϕ index as characterising parameter to explore the best response from inverter configuration with minimum propagation delay, and minimum power consumption at super-high frequency. The paper proposes to analyse the NADGNFET device, in term of ION current, ION/IOFF ratio, cut-off frequency, and gate delay. And observes that low k material with moderate metal work function gives best response. The work then simulates the inverter and group the results into voltage transfer curve (VTC), transient response, and power dissipation category. The result shows that when inverter was subjected to high frequency, all the kϕ combination responds good, however when the inverter was subjected to super-high frequency, the low value of kϕ combination performs well. Thus, the result concludes that SiO2-M2 combination will be best selection to get minimum propagation delay and dynamic power dissipation by the inverter. The test strategy presented in this paper on the basis of kϕ index can serve as benchmark to test inverter device at super-high frequency.