Effects of Interface Trap on Transient Negative Capacitance Effect: Phase Field Model

Taegeon Kim,Changhwan Shin

doi:10.3390/electronics9122141

Abstract

Ferroelectric materials have received significant attention as next-generation materials for gates in transistors because of their negative differential capacitance. Emerging transistors, such as the negative capacitance field effect transistor (NCFET) and ferroelectric field-effect transistor (FeFET), are based on the use of ferroelectric materials. In this work, using a multidomain 3D phase field model (based on the time-dependent Ginzburg–Landau equation), we investigate the impact of the interface-trapped charge (Qit) on the transient negative capacitance in a ferroelectric capacitor (i.e., metal/Zr-HfO2/heavily doped Si) in series with a resistor. The simulation results show that the interface trap reinforces the effect of transient negative capacitance.

Highlights

In recent decades, complementary metal-oxide-semiconductor (CMOS) technology improved consistent with Moore’s Law [1]
The negative interface charge shows that the negative capacitance (NC) region does not exist or lasts momentarily
We investigated the has effect of the interface-trapped charge on the transient negative capacitance

Summary

Introduction

Complementary metal-oxide-semiconductor (CMOS) technology improved consistent with Moore’s Law [1]. Recent simulation work suggests that HfO2-based ferroelectric film has a representative behavior called nonpolar spacer [22]. To examine the impact of the interface-trapped charge, we ignored nonpolar spacer effects. To investigate the effect of the interface trap on transient NC, we resistance-ferroelectric capacitor (R-FEC) circuit using 3D phase field simulation (which is based on modeled a resistance-ferroelectric capacitor (R-FEC) circuit using 3D phase field simulation (which the time-dependent Ginzburg–Landau (TDGL) equation [22,23]). The impacts of the interface trap on transient negative capacitance were investigated not exist. The impacts of the interface trap on transient negative capacitance were using the phase field simulation.

Simulation

Schematic

Results and Discussion

Simulated transient of the circuit withwith the the interface trap:trap:

Conclusions