Abstract
High-k dielectric materials are indispensable as gate layers for micro- and nano-electronic devices. Using first-principles calculations and non-equilibrium Green's function simulations, we studied the electrical transport characteristics of p-type and n-type monolayer MoS2 field effect transistors (FETs) under various gate dielectric environments. We found that the intrinsic dielectric property of the gate insulator played an important role in the transport performance of nanodevices. For both types of MoS2 FETs, a high-k gate insulator enhances the current on/off ratio and reduces the subthreshold swing by properly shifting the valence (p-type) or conduction (n-type) bands around the bias energy window, which has benefits for the design of MoS2-based short-channel nanodevices in the future.
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