Abstract

The effects of dielectric layers on electromigration failure were studied in situ using a high-voltage scanning electron microscope and at the wafer level using conventional accelerated testing. Several different passivation layers were deposited on wafers with A1 interconnect test structures. Prior to the deposition of the final dielectric, the wafers were processed identically and, whenever possible, simultaneously. Interconnects encapsulated with compliant polymer and very thin (0.1 μm) SiO2 layers demonstrated substantial lifetime extensions over those with more rigid (1 μm thick) SiO2 layers. Unpassivated lines behaved dramatically differently and failed much sooner than those covered with only 0.1 μm of SiO2. As expected, increasing the passivation thickness from 0.5 to 4 μm increased the electromigration lifetime for SiO2 covered specimens. The fabrication of silicon dioxide dielectrics using electron-cyclotron-resonance chemical-vapor deposition (CVD) and silicon nitride dielectrics via plasma-enhanced CVD damaged the interconnects. This damage nearly completely removed the barrier to void nucleation during electromigration.

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