Effects of Depth of Cutting on Damage Interferences during Double Scratching on Single Crystal SiC

Duan Nian

doi:10.3390/cryst10060519

Abstract

In this work, the damage interference during scratching of single crystal silicon carbide (SiC) by two cone-shaped diamond grits was experimentally investigated and numerically analyzed by coupling the finite element method (FEM) and smoothed particle hydrodynamics (SPH), to reveal the interference mechanisms during the micron-scale removal of SiC at variable Z-axis spacing along the depth of cutting (DOC) direction. The simulation results were well verified by the scratching experiments. The damage interference mechanism of SiC during double scratching at micron-scale was found to be closely related to the material removal modes, and can be basically divided into three stages at different DOCs: combined interference of plastic and brittle removal in the case of less than 5 µm, interference of cracks propagation when DOC was increased to 5 µm, and weakened interference stage during the fracture of SiC in the case of greater than 5 µm. Hence, DOC was found to play a determinant role in the damage interference of scratched SiC by influencing the material removal mode. When SiC was removed in a combined brittle-plastic mode, the damage interference occurred mainly along the DOC direction; when SiC was removed in a brittle manner, the interference was mainly along the width of cutting; and more importantly, once the fragment of SiC was initiated, the interference was weakened and the effect on the actual material removal depth also reduces. Results obtained in this work are believed to have essential implications for the optimization of SiC wafer planarization process that is becoming increasingly important for the fabrication of modern electronic devices.

Highlights

Owing to its superior physical properties such as wide bandgap, high thermal conductivity, and critical breakdown electric field [1,2,3], single crystal silicon carbide (SiC) has became an ideal wafer material for next-generation microelectronic and photoelectronic devices [4,5,6], which necessitates a damage free surface and subsurface quality of SiC wafers
Knowledge of of the damage interference at the surface/subsurface of ground SiC during the scratching by multiple abrasive grits is essential for the advance of wafer planariziation techniques, which cannot be achieved through a simple superposition of the scratching of each individual grit [10]
As t = 3.0 μs, material damage interference occurred, and at the same time, because the ∆dz was relatively small, the material removal modes during double scratching were both combined plastic-brittle removal modes

Summary

Introduction

Owing to its superior physical properties such as wide bandgap, high thermal conductivity, and critical breakdown electric field [1,2,3], single crystal silicon carbide (SiC) has became an ideal wafer material for next-generation microelectronic and photoelectronic devices [4,5,6], which necessitates a damage free surface and subsurface quality of SiC wafers. It is well known that the grinding process involves the scratching of workpiece by a large number of abrasive grits with irregular geometries, and sometimes randomly distributed on a grinding wheel. Knowledge of of the damage interference at the surface/subsurface of ground SiC during the scratching by multiple abrasive grits is essential for the advance of wafer planariziation techniques, which cannot be achieved through a simple superposition of the scratching of each individual grit [10]. Given the complicated deformation behaviors during interfered scratching, experimental studies have been carried out to identify the controlling factors in the damage formation during the grinding process of several ceramics. The subsurface damage of monolithic ceramics and soda lime glass were found to gradually increase with the increase of scratches cycles [11]. The effects of the normal scratching force and spacing distance on damage

Results

Discussion

Conclusion