Effects of channel layer thickness on the electrical characteristics of top-gate staggered microcrystalline-Si thin-film transistors

Abstract

Effects of channel layer thickness on the electrical characteristics of top-gate staggered microcrystalline-Si thin-film transistors (μC-Si TFTs) have been studied. A thinner channel layer can inherently result in better control over channel region and induce lower channel resistance. In addition, for this TFT device, a thinner channel layer can also lead to larger bending of lateral energy band near the source-electrode/channel contact region, which facilitates inducing more carriers tunneling. As a result, by using a thinner channel layer, a better subthreshold swing and a larger on-state current are achieved at low gate voltages. However, for a given thickness of contact electrode, the usage of a channel layer thinner than the contact electrode would cause obvious corner effect that degrades the on-state characteristics at high gate bias voltages. As a result, for this top-gate staggered μC-Si TFT, a proper channel layer thickness should be employed to simultaneously achieve good subthreshold swing and high driving capability, via retaining good carrier tunneling and low channel resistance without causing considerable corner effect.