Effects of Back Interface on Performance of Dual-Gate InGaZnO Thin-Film Transistor With an Unisolated Top Gate Structure

Abstract

The effects of top gate/InGaZnO back interface on the performance of dual-gate InGaZnO thin-film transistor (TFT) with an unisolated top gate structure are investigated by both experiment and simulation. The back interface is intentionally modulated by using post-metallization annealing (PMA) treatment. The PMA treatment motivates the interfacial reaction and thus results in the formation of an obvious non-stoichiometric TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> at the back interface for the PMA-treated TFT. This TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> suppresses the influences of the top gate on the TFT performance. It is further found that this TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> acts as deep-level acceptor-like traps and is detrimental to the TFT performance. For comparison, the TFT with no PMA treatment exhibits an abrupt back interface and also the top gate effectively suppresses the metal-hydroxyl formation by preventing InGaZnO from absorbing air moisture. Therefore, both TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> and metal-hydroxyl induced traps are significantly suppressed, leading to good performance of the untreated TFT.