Effects and modeling of simultaneous switching noise for BiCMOS off-chip drivers

Abstract

A model of simultaneous switching noise (SSN) for the conventional BiCMOS driver including the influence of negative feedback is presented. Level 1 SPICE-type MOSFET and Gummel-Poon BJT device models are used for the analysis. The model accounts for a reduction in forward current gain, /spl beta//sub F/, that is attributed to high-level injection effects. Closed-form expressions are presented that predict the maximum SSN encountered in low-level and high-level injection. Solutions of the first equation are combined with the second in order to model the complete SSN transient. Model predictions are compared to SPICE simulation results for 5 V, 1 /spl mu/m drivers and 3.5 V, 0.5 /spl mu/m drivers with close agreement. The effects of BJT parasitic resistance, junction capacitance, and forward transit time on reducing induced ground noise are also explored. With the introduction of these parasitics, SPICE predictions of the maximum SSN are approximately 20% lower than closed-form model results. Immunity of the quiet BiCMOS driver to noise present at the ground and power connections is also investigated. It is found that the quiet driver is highly immune to adverse effects caused by SSN at the power connection and partially immune to SSN present at the ground. Coupling between ground noise and the output occurs when the ground noise is greater than two forward diode drops above ground, in which case the output tracks the ground noise with a negative offset of one diode drop.